9 MHz!

More progress on the Z80 computer:

* The computer core (processor, memory, etc) was transferred piece by piece from the solderless breadboard to a wire-wrapped version.
* Termination of the data and address busses was added (1K resistors to ground)
* A 555-based internal clock was added; this will allow execution at speeds up to 1MHz.
* The virtual-control-panel circuit was pared down; it now consists of a PIC16F877A, a MAX232 chip, and a few resistors and capacitors. It’s still on solderless breadboard at this point; a more permanent control panel is planned, using three microcontrollers and having a lot more functionality.

After verifying that it all still worked, I decided to see how fast it would go (the idea being that if it ran well at speed, it should be very reliable at the slow speeds we’ll be using in class next term.) I connected it up to a signal generator and a mixed-signal Agilent scope. It proved to be stable at up to slightly more than 9MHz clock speed (18MHz into the J/K flip-flop).

Here’s a picture of the system in action.

Here is a trace of the system running a "Fibonacci" program. Execution starts at address 0x000A, with a JMP 0x0003 instruction. (The analog trace at the top is address line 12 — which goes high whenever the Z80 writes to memory location 0x1234. The reason that the data for this location is ambiguous is that, unlike the other steps in the program, this data is constantly changing.)

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It works!

After a bit of debugging (some PIC code corrections, some VB code corrections, and finally tracking down a missing direction-pin wire), the Z80 computer is executing code! I wrote a short test program to compute Fibonacci numbers, and it ran correctly.

It still could use quite a few features — such as an internal clear-all-memory routine, program save and load functionality, program trace output, etc. But for now, it’s a working Z80 computer, accessed via RS232.

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Plus ça change…

…plus ça ne change pas. Or so they say, anyway — but the design of this computer has certainly changed. The changes are for the better, though: the core (which will be constructed by the students) has been greatly simplified, with as much functionality as possible having been collected into a control panel unit.

Here is the schematic for the “core.” Some more minor changes may yet happen (perhaps another 74LS245 for the control lines etc), but the core design is essentially finalized. The idea is that the core system can run as a “headless” unit, without a control panel: with the addition of 24 LEDs to show the status of the address and data lines, it should look like a real “Hollywood” computer, complete with blinking lights! I’m still skeptical about putting LEDs directly onto the busses, but we’ll see how that works out. If nothing else, they can be driven by three more ‘245s.

The control panel (still under construction) will include:

  • Rotary hex switches to enter addresses and data;
  • An LCD panel to read addresses and data (and perhaps other information);
  • Run/Stop, Single-Step, Manual/Auto, Reset, and Write switches;
  • An SD card slot and Load/Save switches to back up programs to an SD card; and
  • Three PIC microcontrollers to run all of this.

Right now, I’m creating a set of inter-MPU commands, to keep everything in sync. Complete details will be available here once it’s all finished.

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I’m still here…

…I’ve just been busy working on some really cool paleotechnology projects. Dr. Rosen came across an article about a microprocessor course built around students creating their own 8086-based computer. He asked me what I thought about it — and my first thought was “Can I sign up, even though I’m not an undergrad?”

Since then, I’ve been working on coming up with a working computer design that EET students could have a chance of building in one ten-week term. (Drexel is on the quarter system.) Since nearly all modern PCs are based on x86 architecture, Dr. Rosen suggested that, like the course described in the article, we design the course around an 8086 computer. Here is the design. (Caveat lector: I haven’t completely built this one — let alone debugged the design. It almost certainly has multiple bugs. Consider it pre-alpha.)

Upon further reflection, Dr. Rosen pointed out that this design (rather complex, not to mention costing perhaps $250 in parts) was probably too ambitious for a one-term undergrad class. He asked what I thought we could do to simplify the design. I pared it down, removing the RS232 subsection and making a few other minor changes — but it became apparent to me that an 8088-based design would be significantly simpler and less expensive. Continuing this line of reasoning, I figured that a Z80-based design would be simpler still. (The Z80-based Timex-Sinclair 1000, after all, uses a total of only four ICs.)

Here is the Z80-based design. (Again, this has not yet been completely built, let alone debugged. Should we go with this design and build it, I will post complete plans here.)

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